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Name | Hong, Hao-Chiao |
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Telephone number | 03-5712121 ext54375 |
hchong@mail.nctu.edu.tw | |
Personal website | http://amsdft.cn.nctu.edu.tw/ |
Service unit and department | NCTU EE |
Job title | Professor |
rolestatus | Full-Time |
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Job title | Professor |
master | IC Design and Bio-medical Engineering |
minor | cross-electronic control |
Professor Profile | Analog IC Design |
Research expertise | Mixed-signal circuit design including ADC, DAC, audio codec, PLL, filters, power management, high speed serial interface, and sensor interfaces; design-for-testability (DfT), built-in self-test (BIST) and calibration techniques for mixed-signal circuits. |
Laboratory | Advanced Mixed-Signal IC Design and Design-for-Testability Laboratory, AMSDfT Lab / |
Writing
- Journal Papers
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- Shao-Feng Hung and Hao-Chiao Hong, "A Fully Integrated BIST ΔΣ ADC Using the In-Phase and Quadrature Waves Fitting Procedure," (Regular paper) IEEE Transactions on Instrumentation and Measurement, Vol. 63, No. 12, pp. 2750- 2760, December, 2014 (SCI, EI)
- Hao-Chiao Hong, Yung-Shun Chen, and Wei-Chieh Fang,"14 GSps four-bit noninterleaved data converter pair in 90 nm CMOS with built-in eye diagram testability," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 6, pp. 1238–1247, June, 2014 (SCI, EI)
- Yi Chiu, Tsung-Chih Huang, and Hao-Chiao Hong, "A Three-Axis Single-Proof-Mass CMOS-MEMS Piezoresistive Accelerometer with Frequency Output," Sensors and Materials, Vol. 26, No. 2, pp. 95–108, February, 2014 (SCI)
- Yi Chiu, Hao-Chiao Hong, and Po-Chih Wu, "Development and Characterization of a CMOS-MEMS Accelerometer with Differential LC-Tank Oscillators," IEEE Journal of Microelectromechanical Systems, Vol. 22, No.6, pp. 1285-1295, Dec., 2013. (SCI)
- Shao-Feng Hung and Hao-Chiao Hong, “Experimental Results of Testing a BIST Σ–Δ ADC on the HOY Wireless Test Platform,” Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 28, Issue 5, pp. 571-584, Nov. 2012, DOI:10.1007/s10836-012-5302-7 (SCI)
- Hao-Chiao Hong, “A Static Linear Behavior Analog Fault Model for Switched-Capacitor Circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 31, No.4, pp. 597-609, Apr., 2012. (SCI)
- Sheng-Chaun Liang and Hao-Chiao Hong, “A digitally testable Σ-Δ modulator using the decorrelating Design-for-digital-testability scheme,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, No. 3, pp. 503-507, Mar., 2011. (SCI)
- Hao-Chiao Hong, Fang-Yi Su, and Shao-Feng Hung, “A fully integrated built-in-self-test Σ-Δ ADC based on the modified controlled sine wave fitting procedure,” IEEE Transactions on Instrumentation and Measurement (TIM), Vol. 59, No. 9, pp. 2334-2344, Sept., 2010. (SCI)
- Hao-Chiao Hong, Sheng-Chaun Liang, and Hong-Chin Song, “A built-in-self-test S-D ADC prototype,” Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 25, No. 2-3, pp. 145-156, Jun., 2009 (SCI)
- Hao-Chiao Hong and Sheng-Chaun Liang, “A decorrelating design-for-digital- testability scheme for S-D modulators,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), Vol. 56, No. 1, pp. 60-73, Jan., 2009 (SCI)
- Hao-Chiao Hong, “A design-for-digital-testability circuit structure for Sigma-Delta modulators,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 15, No. 12, pp. 1341-1350, Dec., 2007 (SCI)
- Hao-Chiao Hong, “A Fully-settled linear behavior plus noise model for evaluating the digital stimuli of the design-for-digital-testability Sigma-Delta modulators,” Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 23, pp.527-538, Dec., 2007 (SCI)
- Hao-Chiao Hong and Guo-Ming Lee, “A 65 fJ/conversion-step 0.9-V 200-KS/s rail-to-rail 8-bit successive approximation ADC,” IEEE Journal of Solid-State Circuits (JSSC), Vol. 42, No. 10, pp. 2161-2168, Oct., 2007
- Hao-Chiao Hong and Cheng-Wen Wu, “Selection of high-order analog response extractor for S-D modulation based analog built-in self-test applications,” International Journal of Electrical Engineering, Vol. 11, No.2, pp.103-115, May, 2004.
- Hao-Chiao Hong, Jyun-Liang Huang, Kwang-Ting Cheng, Cheng-Wen Wu, and Ding-Ming Kwai, “Practical considerations in applying Sigma-Delta modulation-based analog BIST to sampled-data systems,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (TCAS-II), Vol. 50, No. 9, pp. 553-566, Sep., 2003 (SCI)
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- Conference Papers
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- Y. Chiu, H.-C. Hong, and W.-H. Hsu, "Effect of asymmetric structures on output enhancement in electromagnetic energy harvesters fabricated by rigid-flex PCB technology," accepted for presentation in Asia-Pacific Conference of Transducers and Micro-Nano Technology, APCOT 2016, Japan (2016)
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- C.-Y. Chiang, L.-Y. Lin, H.-C. Hong, "Design and Experimental Results of a Wireless Power Receiver for the Water Pollution Detection System," in Proc. of the 4th International Symposium on Next-Generation Electronics (IEEE ISNE 2015), Taipei, May , 2015
- Hao-Chiao Hong, Yun-Tse Chen, Shao-Feng Hung, Chin-Cheng Wu, and Yi Chiu, "A cost-effective angle demodulator IC for path matched differential interferometry based sensors," in Proc. IEEE Sensors Conference, pp.1-4, Valencia, Spain, November, 2014 (IEEE)
- Shao-Feng Hung, Long-Yi Lin, and Hao-Chiao Hong, "A Cost-Effective Stimulus Generator for Battery Channel Characterization in Electric Vehicles," in Proc. IEEE Asian Test Symposium, HangZhou, November, 2014 (IEEE)
- Yi-Wei Chen and Hao-Chiao Hong, " A Fast-Locking All-Digital Phase Locked Loop in 90nm CMOS for Gigascale Systems," in Proc. the IEEE International Symposium on Circuits and Systems (ISCAS),Melbourne, Australia, pp. 1134-1137, June, 2014 (IEEE)
- Rong-Zhou Kuo and Hao-Chiao Hong, "A 17-nW, 0.5V, 500S/s, Rail-to-Rail SAR ADC with 8.1 Effective Number of Bits", in Proc. the International VLSI Design, Automation and Test Symposium (VLSI-DAT), Hsinchu, pp. 1-4, April, 2014 (IEEE)
- Long-Yi Lin and Hao-Chiao Hong, “Design of a fault-injectable Fleischer-Laker switched-capacitor biquad for verifying the static linear behavior fault model,” in Proc. IEEE Asian Test Symposium (ATS), pp. 62-66, Yi-Lan, Nov., 2013 (IEEE)
- Rong-Zhou Kuo and Hao-Chiao Hong, “Design of an Ultra-Low Power SAR ADC for Biomedical Applications,” in Proc. the 2nd International Conference on BioSensors, BioElectronics, BioMedical Devices, BioMEMS/NEMS and Applications 2013 (Bio4Apps 2013), Tokyo, Japan, Oct., 2013
- Chih-Chien Chang and Hao-Chiao Hong, "A 5MS/s Fully-Differential SAR ADC with an ENOB of 8.5," in Proceedings of International Conference on Electrical Engineering and Computer Science (EECS), pp.1-4, Tokyo, Japan, March, 2013
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- Shao-Feng. Hung, Long-Yi Lin, and Hao-Chiao Hong, "Testing the Fleischer-Laker switched-capacitor biquad using the diagnosis-after-test procedure,” in Proceedings of the 9th International SoC Design Conference (ISOCC), pp.179-184, Jeju, Korea, November, 2012 (IEEE)
- Yi Chiu, Hao-Chiao Hong, and Po-Chih Wu “CMOS-MEMS accelerometer with differential LC-tank oscillators,” Proc. IEEE Sensors Conference, pp. 1-4, October, 2012 (IEEE)
- Long-Yi Lin, Shao-Feng Hung, and Hao-Chiao Hong, “A Test Procedure to Test for the Capacitor Ratios of a Switched-Capacitor Biquad,” in the 6th VLSI Test Technology Workshop (VTTW), July, 2012
- Shao-Fung Hung, Long-Yi Lin, and Hao-Chiao Hong, "A study on the design of a testable Fleischer-Laker switched-capacitor biquad," in Proceedings of International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'12), pp.119-121, Taipei, Taiwan, May, 2012 (IEEE)
- Kin-Man Lei and Hao-Chiao Hong, “A 12-bit 25MS/s Asynchronous SAR ADC,” in Proceedings of the 22nd VLSI Design/CAD Symposium, August, 2011
- Shao-Fung Hung and Hao-Chiao Hong, "A Fully Integrated Built-in Self-Test Sigma-Delta ADC on a Wireless Test Platform," in Proceedings of IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'11), pp.78-81, Santa Barbara, California, May, 2011 (IEEE)
- Shao-Fung Hung and Hao-Chiao Hong, “Design of a Design-for-Digital-Testability Third-Order Sigma-Delta Modulator,” in Proceedings of IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'11) , pp.110-113, Santa Barbara, California, May, 2011 (IEEE)
- Rong-Zhou Kuo and Hao-Chiao Hong “An Ultra-low Power Rail-to-Rail Successive Approximation ADC with an 8.3 ENOB,” in Proceedings of the 21st VLSI Design/CAD Symposium, pp.687-690, Aug., 2010
- Shao-Fung Hung, Hao-Chiao Hong, and Sheng-Chaun Liang “A Low-Cost Output Response Analyzer for the Built-in-Self-Test S-D Modulator Based on the Controlled Sine Wave Fitting Method,” in Proceedings of the IEEE Asian Test Symposium (ATS), pp.385-388, November, 2009 (IEEE)
- Chen-Kang Ho and Hao-Chiao Hong, “A 6-GS/s, 6-bit, At-speed Testable ADC and DAC Pair in 0.13mm CMOS,” in Proceedings of the International Symposium on VLSI Design, Automation, and Test (VLSI-DAT), pp.207-210, April, 2009 (Granted the best paper award, symposium acceptance rate=30%, 53/178) (IEEE)
- Hao-Chiao Hong, Sheng-Chaun Liang, and Hong-Chin Song, “A cost effective BIST second-order S-D modulator,” in Proceedings of the IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS), pp.314-319, April, 2008 (IEEE)
- Sheng-Chaun Liang, Ding-Jyun Huang, Chen-Kang Ho, and Hao-Chiao Hong, “10 GSamples/s, 4-bit, 1.2V, Design-for-Testability ADC and DAC in 0.13um CMOS Technology,” in Proceedings of the IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 416-419, October, 2007, (acceptance rate=32%, 107/332) (IEEE)
- Tsung-Yin Hsieh and Hao-Chiao Hong, “A 1.76uW, 0.9V, 8-bit successive approximation register ADC with fully-differential input capability,” in Proceedings of the 18th VLSI Design/CAD Symposium, pp. 123-127, August, 2007
- Hao-Chiao Hong and Sheng-Chaun Liang, “A cost effective output response analyzer for S-D modulation based BIST systems,” in Proceedings of the 15th IEEE Asian Test Symposium (ATS), pp.255-261, Nov. 2006. (IEEE)
- Hao-Chiao Hong, “Improving the behavioral simulation accuracy of the design-for-digital-testability second-order S-D modulator,” in the 11th International Mixed-Signal Testing Workshop (IMSTW), Canne, June, 2005 (IEEE)
- Hao-Chiao Hong, Cheng-Wen Wu, and Kwang-Ting Cheng, “A S-D modulation based BIST system with a wide bandwidth fifth-order analog response extractor for diagnosis purpose,” Proceedings of the 13th IEEE Asian Test Symposium (ATS), pp. 62-67, KenTing, November, 2004 (IEEE)
- Hao-Chiao Hong, “Design-for-digital-testability 30MHz second-order S-D modulator,” in Proceedings of the IEEE 2004 Custom Integrated Circuit Conference (CICC) , pp. 211-214, October, 2004 (IEEE)
- Hao-Chiao Hong, Jyun-Liang Huang, Kwang-Ting Cheng, and Cheng-Wen Wu, “On-chip analog response extraction with 1-bit Sigma-Delta modulators,” in Proceedings of the 11th IEEE Asian Test Symposium(ATS), pp. 49-54, Nov., 2002 (IEEE)
- Hao-Chiao Hong and Cheng-Wen Wu, “Optimal integrator gain design of extended MASH high-order S-D modulator,” in Proceedings of the 8th VLSI Design/CAD Symposium, pp. 333-336, Aug., 1997
- Hao-Chiao Hong, Bin-Hong Lin, and Cheng-Wen Wu, “Design and Analysis of multiple-bit Sigma-Delta modulator,” in Proceedings of the IEEE Asia and South Pacific Design Automation Conference(ASPDAC), pp. 419-424, Jan., 1997 (IEEE)
- Hao-Chiao Hong, Shao-Huey Shieh, and Cheng-Wen Wu, “Optimization of the spanning tree carry look-ahead adder,” in Proceedings of the 7th VLSI/CAD symposium, pp. 253-256, Aug., 1996
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- Tech. Report
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- Patent
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- Hao-Chiao Hong and Yu-Shyn Wang, "Digital-to-Analog converter circuit and its weight estimation and calibration method thereof", Taiwan, ROC Patent I456907, issued on 10/11/2014
- Hao-Chiao Hong and Yu-Shian Wang, "DIGITAL-TO-ANALOG CONVERTER (DAC) CIRCUIT AND WEIGHT ERROR ESTIMATION/CALIBRATION METHOD THEREOF, " USA Patent 13/948,322
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- Hao-Chiao Hong, “Device for accurately measuring amplifier’s open-loop gain with digital stimuli,” U.S.A. patent US8,112,236B2, issued on Feb. 7, 2012.
- Hao-Chiao Hong, “利用數字激發訊號來準確測量放大器開路增益之裝置,” P.R.C. patent ZL 200810002352.5 issued on 2011/11/02, Valid period: 2008/01/15- 2028/01/15
- Hao-Chiao Hong, “A reconfigurable switched-capacitor input circuit with digital stimulus acceptability for analog tests,” U.S.A. patent US7,236,116B2, Jun. 26, 2007.
- Hao-Chiao Hong, “於類比測試中可接收數位測試激發訊號之可重新規劃切換電容輸入電路,” ROC Patent I270254. Jan. 2007
- Hao-Chiao Hong, “Bandgap reference voltage generator with a low-cost, low-power, fast start-up circuit,” U.S.A. patent 6,972,550, Dec. 6, 2005
- Hao-Chiao Hong, “High-order Sigma Delta Modulator”, ROC Patent 077991, May 1, 1996
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Year | Project name | Participant | Assignment | Project period | Subsidized / Entrusted organization | Attached file/Reference link | Note |
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2014 | Wireless WAT | Hong, Hao-Chiao | P.I. | 2014-05 ~ 2015-05 | TSMC | / |   |
2005 | Design of a power line communication SoC for automobiles (PI: Prof. C.-C. Su, National Chiao Tung University) | Hong, Hao-Chiao | P.I. of the design of the 10GS/s AD/DA pair | 2005-03 ~ 2008-12 | Ministry of Economic Affairs, Taiwan | / |   |
2005 | Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies (PI: Prof. Cheng-Wen Wu of National Tsinghua University) | Hong, Hao-Chiao | Subproject A Co-P.I. | 2005-12 ~ 2009-11 | Ministry of Economic Affairs, Taiwan | / |   |
Year of award | Name of award | Awarding unit |
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2016 |   |   |
2005 | Excellent mentor award | NCTU |
Year of award | Name of award | Awarding unit |
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2016 | Best paper award | The 10th VLSI Test Technology Workshop |
2013 | Best chip design award in MEMS category (with Prof. Yi Chiu) | The Chip Implementation Center, Taiwan |
2012 | Outstanding chip design award in the analog design category | The Chip Implementation Center, Taiwan |
2012 | The diamond award (the first prize) | Macronix Electronic Co. Ltd. |
2010 | Excellent lecture materials award for the promoting SoC education program (With Prof. Yi Chiu) | Ministry of Education, Taiwan |
2010 | Outstanding chip design award in the analog design category | The Chip Implementation Center, Taiwan |
2010 | The best student paper award | International VLSI-DAT Symposium |
2009 | Outstanding chip design award in the analog design category | The Chip Implementation Center, Taiwan |
2009 | Best chip design award in the analog design category | The Chip Implementation Center, Taiwan |
2008 | Outstanding chip design award in the analog design category | The Chip Implementation Center, Taiwan |
2007 | Outstanding chip design award in the analog design category | The Chip Implementation Center, Taiwan |
2007 | Outstanding chip design award in the analog design category | The Chip Implementation Center, Taiwan |
2006 | The second prize in the analog circuit design category, the IC contest of universities and colleges | Ministry of Education, Taiwan |
School name | Country | Department | Degree | Starting date |
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National Tsing Hua University | Taiwan | Electrical Engineering | Ph. D. | ~ 2003-06 |
National Tsing Hua University | Taiwan | Electrical Engineering | M.S. | 1990-09 ~ 1992-06 |
National Tsing Hua University | Taiwan | Electrical Engineering | B.S. | 1986-09 ~ 1990-06 |
Service organization/unit | Job title | Department | Responsbilities | Starting date |
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National Chiao Tung University | Professor | Electrical and Computer Engineering |   | 2012-08 ~ |
National Chiao Tung University | Associate Professor | Electrical and Computer Engineering |   | 2009-03 ~ 2012-07 |
National Chiao Tung University | Associate Professor | Electrical and Control Engineering |   | 2008-08 ~ 2009-03 |
National Chiao Tung University | Assistant Professor | Department of Electrical and Control Engineering |   | 2004-02 ~ 2008-08 |
Intellectual Property Library Company | Senior Manager | Analog IP Department | Analog IP Design | 2004-01 ~ 2001-08 |
TSMC | Principle Engineer | Design Service Division | Analog IP Design | 2001-07 ~ 1997-06 |
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