Lee, Yu-Min
Associate Professor
Name Lee, Yu-Min
Office Tel No. 03-513-1274
Email yumin@nctu.edu.tw
website http://vlsi-eda.cm.nctu.edu.tw/yumin/
Professor Profile Yu-Min Lee received the B.S. and M.S. degrees in communication engineering from the National Chiao-Tung University, Taiwan, in 1991 and 1993, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Wisconsin-Madison in 2003. In 2003, he joined the Faculty of National Chiao Tung University, Hsinchu, Taiwan, where he currently holds a position as Associate Professor in the Department of Electrical and Computer Engineering.His research interests include computer-aided design on VLSI circuits with emphases on interconnect analysis and optimization, and circuit/thermal/electro-thermal simulation. Dr. Lee is a recipient of the ISPD Best Paper Award in 2003 and the ASP-DAC Best Papaer Award in 2013.
Research expertise Computer-aided design of VLSI circuits
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Job title Associate Professor
職稱 Associate Professor
備用1 Reserve 1
授課領域 Yu-Min Lee received the B.S. and M.S. degrees in communication engineering from the National Chiao-Tung University, Taiwan, in 1991 and 1993, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Wisconsin-Madison in 2003. In 2003, he joined the Faculty of National Chiao Tung University, Hsinchu, Taiwan, where he currently holds a position as Associate Professor in the Department of Electrical and Computer Engineering.
His research interests include computer-aided design on VLSI circuits with emphases on interconnect analysis and optimization, and circuit/thermal/electro-thermal simulation. Dr. Lee is a recipient of the ISPD Best Paper Award in 2003 and the ASP-DAC Best Papaer Award in 2013.
研究專長 Computer-aided design of VLSI circuits
討論區 0
Year Paper Title
2017 Yu-Min Lee and Chia-Tung Ho, “InTraSim: Incremental Transient Simulation of Power Grids,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 12, pp 2052~2065, December 2017.
2017 Yu-Min Lee, Kuan-Te Pan, and Chun Chen, “NaPer: A TSV Noise-Aware Placer,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.25, no. 5, pp. 1703~1713, May 2017.
2016 Pei-Yu Huang and Yu-Min Lee, "Full-Chip Thermal Analysis for the Early Design Stage via Generalized Integral Transforms", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 17, no. 5, pp. 613~626 , 2009.
2016 Hong-Wen Chiou, Yu-Min Lee, “Thermal Simulation for Two-Phase Liquid Cooling 3D-ICs,” Journal of Computer and Communications, vol. 4, no. 15, pp. 33~45, November 2016.
2015 Yu-Min Lee, Chi-Wen Pan, Pei-Yu Huang, and Chi-Ping Yang, "LUTSim: A Look-Up Table Based Thermal Simulator for 3-D ICs," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 8, pp. 1250~1263, August 2015.
2015 Pei-Yu Huang and Yu-Min Lee, “An Efficient Method for Analyzing the On-Chip Thermal Reliability with Considering Process Variations,” ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 18, no. 2, article no. 41, July 2013.
2015 Ta-Sung Lee, Yu-min Lee, "Phase Coherent Blind Equalization for High Order QAM Signals", Journal of the Chinese Institute of Electrical Engineering, vol.1, no.1, 1994.
2015 Yu-Min Lee and Charlie Chung-Ping Chen, "Power Grid Transient Simulation in Linear Time Based on Transmission-Line-Modeling Alternating-Direction-Implicit Method", IEEE Trans. Computer-Aided Design of Integrated Circuits And Systems (TCAD), Vol. 21, No. 11, pp. 1343 -1352, 2002.
2015 Yu-Min Lee, Charlie Chung-Ping Chen, and D. F. Wong, "Optimal Wire-sizing Function under the Elmore Delay Model with Bounded Wiresizes", IEEE Trans. Circuits & Systems-I (TCAS-I) Vol. 49, No. 11, pp. 1671--1677, 2002.
2015 Yu-Min Lee, Charlie Chung-Ping Chen, Yao-Wen Chang, and D. F. Wong, "Simultaneous Buffer-sizing and Wire-sizing for Clock Trees Based on Lagrangian Relaxation", VLSI Design Journal, vol. 15, no. 3, pp. 587-594, 2002.
2015 Yu-Min Lee and Charlie Chung-Ping Chen, "The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method", IEEE Trans. Computer-Aided Design of Integrated Circuits And Systems (TCAD), Vol. 22, No. 11, pp. 1545-1550, 2003.
2015 Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Wang, and Charlie Chung-Ping Chen, "HiPRIME: Hierarchical and Passivity Preserved Interconnect Macromodeling Engine for RLKC Power Delivery", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 24, no. 6, pp. 797~806, 2005.
2015 Yu-Min Lee and Po-Yi Chiang, “Effective Sleep Transistor Sizing Algorithm for Leakage Power Reduction,” International Journal of Electrical Engineering (IJEE), vol. 16, no. 5, pp. 421-431, October 2009.
2015 Yu-Min Lee and Chi-Wen Pan, “Redundant Via Insertion with Wire Spreading Capability,” International Journal of Electrical Engineering (IJEE), vol. 17, no. 6, pp. 383-398, December 2010.
Year Paper Title
2017 Hong-Wen Chiou, Yu-Min Lee, Hsuan-Hsuan Hsiao, Liang-Chia Cheng, “Thermal modeling and design on smartphones with heat pipe cooling technique,” in International Conference on Computer Aided Design (ICCAD), 2017.
2017 Yu-Min Lee, Chi-Han Lee, Yan-Cheng Zhu, “Yield-Driven Redundant Power Bump Assignment for Power Network Robustness,” in Asia South Pacific Design Automation Conference (ASPDAC), 2017.
2016 Hong-Wen Chiou, Yu-Min Lee, “Thermal Simulation for Two-Phase Liquid Cooling 3D-ICs,” in International Conference on Computer Simulation, Graphics and Aided Design (CSGAD), 2016.
2015 Yu-Min Lee, Chun Chen, JiaXing Song, Kuan-Te Pan, “A TSV Noise-Aware 3-D Placer,” in The Design, Automation, and Test in Eurpoe Conference (DATE), 2015.
2015 JiaXing Song, Yu-Min Lee, Chia-Hung Ho, “ThermPL: Thermal-aware Placement Based on Thermal Contribution and Locality,” in International Symposium on VLSI Design and Test (VLSI-DAT), 2016.
2015 Ting-Yuan Wang, Yu-Min Lee, and Charlie Chung-Ping Chen, "3D Thermal-ADI: an efficient chip-level transient thermal simulator", International Symposium on Physical Design (ISPD) 2003 (Best Paper Award).
2015 Chi-Wen Pan, Yu-Min Lee, Pei-Yu Huang, Chi-Ping Yang, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai, "I-LUTSim: An Iterative Look-Up Table Based Thermal Simulator for 3-D ICs," in Asia South Pacific Design Automation Conference (ASPDAC), 2013. (Best Paper Award)
2015 Chia-Tung Ho, Yu-Min Lee, “Efficient Transient Incremental Analysis of On-Chip Power Grid,” in Asia-Pacific Radio Science Conference (AP-RASC), 2013. (invited)
2015 Yu-Min Lee, Charlie Chung-Ping Chen, "The power grid transient simulation in linear time based on 3D alternating-direction-implicit method", Design, Automation and Test in Europe (DATE) 2003.
2015 Yu-Min Lee, Charlie Chung-Ping Chen, "A hierarchical analysis methodology for chip-level power delivery with realizable model reduction", Asia South Pacific Design Automation Conference (ASPDAC) 2003.
2015 Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, and Charlie Chung-Ping Chen, "HiPRIME: Hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery", Design Automation Conference (DAC) 2002.
2015 Yu-Min Lee, Hing Yin Lai, Charlie Chung-Ping Chen, "Optimal spacing and capacitance padding for general clock struct", Asia South Pacific Design Automation Conference (ASPDAC) 2001.
2015 Saisanthosh Balakrishnan, Jong Hyuk Park, Hyungsuk Kim, Yu-Min Lee, and Charlie Chung-Ping Chen, "Linear time hierarchical capacitance extraction without multiple expansion", International Conference on Computer Design (ICCD) 2001.
2015 Yu-Min Lee, Charlie Chung-Ping Chen, "Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method", International Conference on Computer Aided Design (ICCAD) 2001.
2015 Pei-Yu Huang,Yu-Min Lee, Jeng-Liang Tsai, and Charlie Chung-Ping Chen, "Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method," International Symposium on Circuits and Systems (ISCAS) 2006.
2015 Yih-Lang Lin, Chih-Hong Hwang, and Yu-Min Lee, "Performance- and congestion-driven multilevel router," 13th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2006.
2015 Cheng-Hsuan Chiu, Yu-Chan Chang, Pei-Yu Huang, Chih-Hong Hwang, and Yu-Min Lee, "Crosstalk-driven slacement with considering on-chip mutual inductance and RLC noise", 13th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2006.
2015 Yu-Min Lee, Huan-Yu Chou, and Pei-Yu Huang, "An aggregation-based algebraic multigrid method for power grid analysis," 8th International Symposium on Quality Electronic Design (ISQED) 2007.
2015 Pei-Yu Huang, Chih-Kang Lin and Yu-Min Lee, "Hierarchical power delivery network analysis using Markov Chains," IEEE International SOC Conference (SOCC) 2007.
2015 Yu-Min Lee, Charlie Chung-Ping Chen, "The power grid transient simulation in linear time based on 3D alternating-direction-implicit method", Progress In Electromagnetics Research Symposium (PIERS) 2003.
2015 Pei-Yu Huang, Chih-Kang Lin, and Yu-Min Lee, "Full-chip thermal analysis for the early design stage via generalized integral transforms," Asia South Pacific Design Automation Conference (ASPDAC) 2008.
2015 Pei-Yu Huang, Jia-Hong Wu and Yu-Min Lee, "Stochastic thermal simulation considering spatial correlated within-die process variations," Asia South Pacific Design Automation Conference (ASPDAC) 2009.
2015 Shih-An Yu, Pei-Yu Huang and Yu-Min Lee, "A multiple supply voltage based power reduction method in 3-D ICs considering process variations and thermal effects," Asia South Pacific Design Automation Conference (ASPDAC) 2009.
2015 Cheok-Kei Lei, Po-Yi Chiang and Yu-Min Lee, "Post-routing redundant via insertion with wire spreading capability," Asia South Pacific Design Automation Conference (ASPDAC) 2009.
2015 Jin-Tai Yan, Zhi-Wei Chen, Bo-Yi Chiang and Yu-Min Lee, "Timing-constrained yield-driven redundant via insertion," in Asia Pacific Conference on Circuits and Systems (APCCAS) 2008.
2015 Yu-Min Lee, Tsung-You Wu, and Po-Yi Chiang, “A Hierarchical Bin-Based Legalizer for Standard-Cell Designs with Minimal Disturbance,” Asia South Pacific Design Automation Conference (ASPDAC) 2010.
2015 Shu-Han Wei, Bing-Shiun Su, Yu-Min Lee, and Chi-Wen Pan, “Spatial Correlation Extraction with a Limit Amount Measurement Data,” in Asia Symposium on Quality Electronic Design (ASQED) 2010.
2015 Huai-Chung Chang, Pei-Yu Huang, Ting-Jung Li, and Yu-Min Lee, “Statistical Electro-Thermal Analysis with High Compatibility of Leakage Power Models,” International SoC Conference (SOCC) 2010
2015 Chia Tung Ho, Yu-Min Lee, Shu-Han Wei, Liang-Chia Cheng, “Incremental Transient Simulation of Power Grid,”in International Symposium on Physical Design (ISPD), 2014.
2015 Yu-Min Lee, Charlie Chung-Ping Chen “Hierarchical model order reduction for signal-integrity driven interconnect synthesis”, Proceedings of the 11th Great Lakes Symposium on VLSI, pp. 109-114, 2001. (EI)
2015 Simon Yi-Hung Chen, Zhe-Yu Lin ,Yu-Min Lee, “LPGC : A Novel Low Power Driven Placement Algorithm Based on Optimal Gated Clock Topology” in Proceedings of the 16th VLSI Design/CAD Symposium, 2005.
2015 Huan-Yu Chou and Yu-Min Lee, “An Aggregation-Based Algebraic Multigrid Method with Application to On-Chip Power Network Analysis” in Proceedings of the 16th VLSI Design/CAD Symposium, 2006.
2015 Pei-Yu Huang, Chih-Kang Lin, and Yu-Min Lee, “Full-Chip Thermal Analysis via Generalized Integral Transforms,” the 14th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), 2007.
2015 Cheok-Kei Lei, Bo-Yi Chiang and Yu-Min Lee, “An efficient redundant via insertion with wire pushing capability,” in Proceedings of the 19th VLSI Design/CAD Symposium, 2008.
2015 Shih-An Yu, Pei-Yu Huang and Yu-Min Lee, “Power optimization in 3D ICs considering process variations and thermal effect,” in Proceedings of the 19th VLSI Design/CAD Symposium, 2008.
2015 Pei-Yu Huang, Jia-Hong Wu, Yu-Min Lee, and Huai-Chung Chang, “Stochastic thermal simulation considering with-in die process variations,” in Proceedings of the 19th VLSI Design/CAD Symposium, 2008.
2015 Tsung-You Wu and Yu-Min Lee, “Fast Legalize: legalization with minimal disturbance for standard cell design,” in Proceedings of the 20th VLSI Design/CAD Symposium, 2009.
2015 Chi-Wen Pan and Yu-Min Lee, “Redundant via insertion under timing constraints,” in International Symposium on Quality Electronic Design (ISQED), 2011.
2015 Shu-Han Wei and Yu-Min Lee, “Supply Voltage Assignment for Power Reduction in 3D ICs Consudering Thermal Effect and Level Shifter Budget,” in International Symposium on VLSI Design and Test (VLSI-DAT), 2011.
2015 Pei-Yu Huang, Yu-Min Lee, and Chi-Wen Pan “On-Chip Statistical Hot-Spot Estimation Using Mixed-Mesh Statistical Polynomial Expressing Generating and Skew-Normal Based Moment Matching Techniques,” in Asia South Pacific Design automation Conference (ASPDAC), 2012.
2015 Yi-Hsuan Lee, Yu-Min Lee, Liang-Chia Cheng, Yen-Tang Chang, "A Robust Incremental Power Grid Analyzer by Macromodeling Approach and Orthogonal Matching Pursuit," Asia Symposium on Quality Electronic Design (ASQED), 2012.
2015 Yu-Min Lee, Tsung-Heng Wy, Pei-Yu Huang, Chi-Ping Yang, "NUMANA: A Hybrid Numerical and Analytical Thermal Simulator for 3-D ICs," in The Design, Automation, and Test in Eurpoe Conference (DATE), 2013.
2015 Shu-Han Wei, Yu-Min Lee, Chia-Hung Ho, Chih-Ting Sun, Liang-Chia Cheng, “Power Delivery Network Design for Wiring and TSV Resource Minimization in TSV-Based 3-D ICs,” in International Symposium on VLSI Design and Test (VLSI-DAT), 2013.
Project Category Year Project Title Participator Job Title Period Unit
Industrial Collaboration 2017 Thermal Modeling and Analysisfor Handheld Devices Lee, Yu-Min Principal Investigator 2017.01 ~ 2017.12 MediaTek Inc.
Industrial Collaboration 2017 Electronic system-level exploration of power/performance impacts of software/hardware architectural decisions (III) Lee, Yu-Min Principal Investigator 2017.01 ~ 2017.12 ITRI
Research Projects 2016 Yield-Driven Redundant Power Pad Assignment for On-Chip Power Network Lee, Yu-Min Principal Investigator 2016.08 ~ 2017.07 MOST
Industrial Collaboration 2016 Electronic system-level exploration of power/performance impacts of software/hardware architectural decisions (II) Lee, Yu-Min Principal Investigator 2016.01 ~ 2016.12 ITRI
Industrial Collaboration 2016 Thermal Modeling and Analysis for Handheld Devices (II) Lee, Yu-Min Principal Investigator 2015.08 ~ 2016.12 MediaTek Inc.
Industrial Collaboration 2015 Electronic system-level exploration of power/performance impacts of software/hardware architectural decisions (I) Lee, Yu-Min Principal Investigator 2015.01 ~ 2016.12 ITRI
Research Projects 2014 3-D Power Delivery Network Diagnosis and Treatment Techniques Lee, Yu-Min Principal Investigator 2014.08 ~ 2015.07 MOST
Industrial Collaboration 2014 Thermal Modeling and Analysis for Handheld Devices (I) Lee, Yu-Min Principal Investigator 2014.08 ~ 2015.07 MediaTek Inc.
Research Projects 2013 3-D IC Thermal Analysis with Considering Advanced Thermal Dissipation Techniques Lee, Yu-Min Principal Investigator 2013.08 ~ 2014.07 MOST
Industrial Collaboration 2013 3-D Power Network Diagnosis Technique Lee, Yu-Min Principal investigator 2013.01 ~ 2013.12 ITRI
Industrial Collaboration 2013 Prediction in Package Warpage Lee, Yu-Min Principal Investigator 2012.09 ~ 2013.08 SPIL
Research Projects 2012 Parallel computing compatible thermal analysis techniques for 3D ICs (II) Lee, Yu-Min Principal Investigator 2012.08 ~ 2013.07 NSC
Industrial Collaboration 2012 2012.02 ~ 2012.11
Industrial Collaboration 2012 3-D IC Power Delivery Network Design Lee, Yu-Min Principal Investigator 2012.01 ~ 2012.12 ITRI
Industrial Collaboration 2012 Thermal Modeling and Analysis Techniques Lee, Yu-Min Principal Investigator 2012.01 ~ 2012.12 ITRI
Research Projects 2011 Parallel computing compatible thermal analysis techniques for 3D ICs (I) Lee, Yu-Min Principal Investigator 2011.08 ~ 2012.07 NSC
Industrial Collaboration 2011 Design Automation Flow and Environment Compatible Thermal Analysis Technique Lee, Yu-Min Principal Investigator 2011.01 ~ 2011.12 ITRI
Industrial Collaboration 2011 3-D IC Power Delivery Network Design Lee, Yu-Min Principal Investigator 2011.01 ~ 2011.12 ITRI
Research Projects 2010 Stochastic Electro-Thermal Simulation for 3-D ICs and Its Application to 3-D IC Power Optimization (2/2) Lee, Yu-Min Principal Investigator 2010.08 ~ 2011.07 NSC
Industrial Collaboration 2010 Efficiently Thermal Approximation of 3D ICs with Considering TSV/TTSV Effects Lee, Yu-Min Principal Investigator 2010.01 ~ 2010.12 ITRI
Research Projects 2009 Stochastic Electro-Thermal Simulation for 3-D ICs and Its Application to 3-D IC Power Optimization (1/2) Lee, Yu-Min Principal Investigator 2009.08 ~ 2010.07 NSC
Research Projects 2008 Process Variations Aware Interconnect Modeling, Timing Analysis and Optimization (3/3) Yu-Min Lee Principal Investigator 2008.08 ~ 2009.07 NSC
Industrial Collaboration 2008 Net Delay Analysis Lee, Yu-Min Principal Investigator 2008.07 ~ 2009.07 SpringSoft Inc.
Research Projects 2007 Compact Thermal Modeling and Efficient Thermal Simulation for Hot Spots Verifications of Modern IC Designs Yu-Min Lee Principal Investigator 2007.08 ~ 2008.07 NSC
Research Projects 2007 Process Vaariations Aware Interconnect Modeling, Timing Analysis and Optimization Yu-Min Lee Principal Investigator 2007.08 ~ 2008.07 NSC
Research Projects 2006 Compact Thermal Modeling and Efficient Thermal Simulation for Hot Spots Verifications of Modern IC Designs (2/3) Yu-Min Lee Principal Investigator 2006.08 ~ 2007.07 NSC
Research Projects 2006 Process Variations Aware Interconnect Modeling, Timing Analysis and Optimization (1/3) Yu-Min Lee Principal Investigator 2006.08 ~ 2007.07 NSC
Research Projects 2005 Power Delivery Network Analysis with Hierarchical Model Order Reduction Techniques (3/3) Yu-Min Lee Principal Investigator 2005.08 ~ 2006.07 NSC
Research Projects 2005 Compact Thermal Modeling and Efficient Thermal Simulation for Hot Spots Verifications of Modern IC Designs (1/3) Yu-Min Lee Principal Investigator 2005.08 ~ 2006.07 NSC
Research Projects 2004 Power Delivery Network Analysis with Hierarchical Model Order Reduction Techniques (2/3) Yu-Min Lee Principal Investigator 2004.08 ~ 2005.07 NSC
Research Projects 2003 Power Delivery Network Analysis with Hierarchical Model Order Reduction Techniques (1/3) Yu-Min Lee Principal Investigator 2003.11 ~ 2004.07 NSC
Year Lab Title Location
VLSI-EDA Laboratory ED 718
Country School Name Department Degree Duration
USA University of Wisconsin-Madison　 Electrical and Computer Engineering　 Ph.D 1997.09 ~ 2003.08
TAIWAN National Chiao Tung University　 Communication Engineering　 M.S 1991.09 ~ 1993.06
TAIWAN　 National Chiao Tung University　 Communication Engineering　 B.S. 1987.09 ~ 1991.06
Organization Title Job Title Duration
Intel Corp., Austin, Texas　 Summer Intern　 2001.06 ~ 2001.09
ZyXEL Communications Corp., Hsinchu, Taiwan　 Senior Engineer　 1995.06 ~ 1995.12
Honor Category Year Award Name Awarding Unit
External Honor 2013 ASPDAC 2013 Best Paper Award IEEE/ACM
External Honor 2013 The Honorable Mention, supervision for the IC/CAD Contest
External Honor 2009
Internal Honor 2008
External Honor 2007 The 1st Place, supervision for the IC/CAD Contest Ministry of Education
External Honor 2003 ISPD 2003 Best Paper Award IEEE/ACM/SIGDA